Implemented project structure

This commit is contained in:
Fabio Scotto di Santolo
2025-11-29 18:39:57 +01:00
commit c59b4004e5
6024 changed files with 1100108 additions and 0 deletions

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/* elfos.h -- operating system specific defines to be used when
targeting GCC for some generic ELF system
Copyright (C) 1991-2023 Free Software Foundation, Inc.
Based on svr4.h contributed by Ron Guilmette (rfg@netcom.com).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#define TARGET_OBJFMT_CPP_BUILTINS() \
do \
{ \
builtin_define ("__ELF__"); \
} \
while (0)
/* Define a symbol indicating that we are using elfos.h.
Some CPU specific configuration files use this. */
#define USING_ELFOS_H
/* The prefix to add to user-visible assembler symbols.
For ELF systems the convention is *not* to prepend a leading
underscore onto user-level symbol names. */
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX ""
/* The biggest alignment supported by ELF in bits. 32-bit ELF
supports section alignment up to (0x80000000 * 8), while
64-bit ELF supports (0x8000000000000000 * 8). If this macro
is not defined, the default is the largest alignment supported
by 32-bit ELF and representable on a 32-bit host. Use this
macro to limit the alignment which can be specified using
the `__attribute__ ((aligned (N)))' construct. */
#ifndef MAX_OFILE_ALIGNMENT
#define MAX_OFILE_ALIGNMENT (((unsigned int) 1 << 28) * 8)
#endif
/* Use periods rather than dollar signs in special g++ assembler names. */
#define NO_DOLLAR_IN_LABEL
/* Writing `int' for a bit-field forces int alignment for the structure. */
#ifndef PCC_BITFIELD_TYPE_MATTERS
#define PCC_BITFIELD_TYPE_MATTERS 1
#endif
/* All ELF targets can support DWARF-2. */
#define DWARF2_DEBUGGING_INFO 1
/* All ELF targets can support CTF. */
#define CTF_DEBUGGING_INFO 1
/* All ELF targets can support BTF. */
#define BTF_DEBUGGING_INFO 1
/* The GNU tools operate better with dwarf2, and it is required by some
psABI's. Since we don't have any native tools to be compatible with,
default to dwarf2. */
#ifndef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
#endif
/* All SVR4 targets use the ELF object file format. */
#define OBJECT_FORMAT_ELF
/* Output #ident as a .ident. */
#undef TARGET_ASM_OUTPUT_IDENT
#define TARGET_ASM_OUTPUT_IDENT default_asm_output_ident_directive
#undef SET_ASM_OP
#define SET_ASM_OP "\t.set\t"
/* Most svr4 assemblers want a .file directive at the beginning of
their input file. */
#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
/* This is how to allocate empty space in some section. The .zero
pseudo-op is used for this on most svr4 assemblers. */
#define SKIP_ASM_OP "\t.zero\t"
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(FILE, SIZE) \
fprintf ((FILE), "%s" HOST_WIDE_INT_PRINT_UNSIGNED "\n",\
SKIP_ASM_OP, (SIZE))
/* This is how to store into the string LABEL
the symbol_ref name of an internal numbered label where
PREFIX is the class of label and NUM is the number within the class.
This is suitable for output with `assemble_name'.
For most svr4 systems, the convention is that any symbol which begins
with a period is not put into the linker symbol table by the assembler. */
#undef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
do \
{ \
char *__p; \
(LABEL)[0] = '*'; \
(LABEL)[1] = '.'; \
__p = stpcpy (&(LABEL)[2], PREFIX); \
sprint_ul (__p, (unsigned long) (NUM)); \
} \
while (0)
/* Output the label which precedes a jumptable. Note that for all svr4
systems where we actually generate jumptables (which is to say every
svr4 target except i386, where we use casesi instead) we put the jump-
tables into the .rodata section and since other stuff could have been
put into the .rodata section prior to any given jumptable, we have to
make sure that the location counter for the .rodata section gets pro-
perly re-aligned prior to the actual beginning of the jump table. */
#undef ALIGN_ASM_OP
#define ALIGN_ASM_OP "\t.align\t"
#ifndef ASM_OUTPUT_BEFORE_CASE_LABEL
#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
ASM_OUTPUT_ALIGN ((FILE), 2)
#endif
#undef ASM_OUTPUT_CASE_LABEL
#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \
do \
{ \
ASM_OUTPUT_BEFORE_CASE_LABEL (FILE, PREFIX, NUM, JUMPTABLE); \
(*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
} \
while (0)
/* The standard SVR4 assembler seems to require that certain builtin
library routines (e.g. .udiv) be explicitly declared as .globl
in each assembly file where they are referenced. */
#define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
(*targetm.asm_out.globalize_label) (FILE, XSTR (FUN, 0))
/* This says how to output assembler code to declare an
uninitialized external linkage data object. Under SVR4,
the linker seems to want the alignment of data objects
to depend on their types. We do exactly that here. */
#define COMMON_ASM_OP "\t.comm\t"
#undef ASM_OUTPUT_ALIGNED_COMMON
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
do \
{ \
fprintf ((FILE), "%s", COMMON_ASM_OP); \
assemble_name ((FILE), (NAME)); \
fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED ",%u\n", \
(SIZE), (ALIGN) / BITS_PER_UNIT); \
} \
while (0)
/* This says how to output assembler code to declare an
uninitialized internal linkage data object. Under SVR4,
the linker seems to want the alignment of data objects
to depend on their types. We do exactly that here. */
#define LOCAL_ASM_OP "\t.local\t"
#undef ASM_OUTPUT_ALIGNED_LOCAL
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
do \
{ \
fprintf ((FILE), "%s", LOCAL_ASM_OP); \
assemble_name ((FILE), (NAME)); \
fprintf ((FILE), "\n"); \
ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
} \
while (0)
/* This is the pseudo-op used to generate a contiguous sequence of byte
values from a double-quoted string WITHOUT HAVING A TERMINATING NUL
AUTOMATICALLY APPENDED. This is the same for most svr4 assemblers. */
#undef ASCII_DATA_ASM_OP
#define ASCII_DATA_ASM_OP "\t.ascii\t"
/* Support a read-only data section. */
#define READONLY_DATA_SECTION_ASM_OP "\t.section\t.rodata"
/* On svr4, we *do* have support for the .init and .fini sections, and we
can put stuff in there to be executed before and after `main'. We let
crtstuff.c and other files know this by defining the following symbols.
The definitions say how to change sections to the .init and .fini
sections. This is the same for all known svr4 assemblers. */
#define INIT_SECTION_ASM_OP "\t.section\t.init"
#define FINI_SECTION_ASM_OP "\t.section\t.fini"
/* Output assembly directive to move to the beginning of current section. */
#ifdef HAVE_GAS_SUBSECTION_ORDERING
# define ASM_SECTION_START_OP "\t.subsection\t-1"
# define ASM_OUTPUT_SECTION_START(FILE) \
fprintf ((FILE), "%s\n", ASM_SECTION_START_OP)
#endif
#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)
/* Switch into a generic section. */
#define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
#undef TARGET_ASM_SELECT_RTX_SECTION
#define TARGET_ASM_SELECT_RTX_SECTION default_elf_select_rtx_section
#undef TARGET_ASM_SELECT_SECTION
#define TARGET_ASM_SELECT_SECTION default_elf_select_section
#undef TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
#define TARGET_HAVE_SWITCHABLE_BSS_SECTIONS true
/* Define the strings used for the special svr4 .type and .size directives.
These strings generally do not vary from one system running svr4 to
another, but if a given system (e.g. m88k running svr) needs to use
different pseudo-op names for these, they may be overridden in the
file which includes this one. */
#define TYPE_ASM_OP "\t.type\t"
#define SIZE_ASM_OP "\t.size\t"
/* This is how we tell the assembler that a symbol is weak. */
#define ASM_WEAKEN_LABEL(FILE, NAME) \
do \
{ \
fputs ("\t.weak\t", (FILE)); \
assemble_name ((FILE), (NAME)); \
fputc ('\n', (FILE)); \
} \
while (0)
#define ASM_OUTPUT_SYMVER_DIRECTIVE(FILE, NAME, NAME2) \
do \
{ \
fputs ("\t.symver\t", (FILE)); \
assemble_name ((FILE), (NAME)); \
fputs (", ", (FILE)); \
assemble_name ((FILE), (NAME2)); \
fputc ('\n', (FILE)); \
} \
while (0)
/* The following macro defines the format used to output the second
operand of the .type assembler directive. Different svr4 assemblers
expect various different forms for this operand. The one given here
is just a default. You may need to override it in your machine-
specific tm.h file (depending upon the particulars of your assembler). */
#define TYPE_OPERAND_FMT "@%s"
/* Write the extra assembler code needed to declare a function's result.
Most svr4 assemblers don't require any special declaration of the
result value, but there are exceptions. */
#ifndef ASM_DECLARE_RESULT
#define ASM_DECLARE_RESULT(FILE, RESULT)
#endif
/* These macros generate the special .type and .size directives which
are used to set the corresponding fields of the linker symbol table
entries in an ELF object file under SVR4. These macros also output
the starting labels for the relevant functions/objects. */
/* Write the extra assembler code needed to declare a function properly.
Some svr4 assemblers need to also have something extra said about the
function's return value. We allow for that here. */
#ifndef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
do \
{ \
ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
ASM_OUTPUT_FUNCTION_LABEL (FILE, NAME, DECL); \
} \
while (0)
#endif
/* Write the extra assembler code needed to declare the name of a
cold function partition properly. Some svr4 assemblers need to also
have something extra said about the function's return value. We
allow for that here. */
#ifndef ASM_DECLARE_COLD_FUNCTION_NAME
#define ASM_DECLARE_COLD_FUNCTION_NAME(FILE, NAME, DECL) \
do \
{ \
ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
ASM_OUTPUT_FUNCTION_LABEL (FILE, NAME, DECL); \
} \
while (0)
#endif
/* Write the extra assembler code needed to declare an object properly. */
#ifdef HAVE_GAS_GNU_UNIQUE_OBJECT
#define USE_GNU_UNIQUE_OBJECT flag_gnu_unique
#else
#define USE_GNU_UNIQUE_OBJECT 0
#endif
#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
do \
{ \
HOST_WIDE_INT size; \
\
/* For template static data member instantiations or \
inline fn local statics and their guard variables, use \
gnu_unique_object so that they will be combined even under \
RTLD_LOCAL. Don't use gnu_unique_object for typeinfo, \
vtables and other read-only artificial decls. */ \
if (USE_GNU_UNIQUE_OBJECT && DECL_ONE_ONLY (DECL) \
&& (!DECL_ARTIFICIAL (DECL) || !TREE_READONLY (DECL))) \
ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "gnu_unique_object"); \
else \
ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
\
size_directive_output = 0; \
if (!flag_inhibit_size_directive \
&& (DECL) && DECL_SIZE (DECL)) \
{ \
size_directive_output = 1; \
size = tree_to_uhwi (DECL_SIZE_UNIT (DECL)); \
ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, size); \
} \
\
ASM_OUTPUT_LABEL (FILE, NAME); \
} \
while (0)
/* Output the size directive for a decl in rest_of_decl_compilation
in the case where we did not do so before the initializer.
Once we find the error_mark_node, we know that the value of
size_directive_output was set
by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
#undef ASM_FINISH_DECLARE_OBJECT
#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END)\
do \
{ \
const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
HOST_WIDE_INT size; \
\
if (!flag_inhibit_size_directive \
&& DECL_SIZE (DECL) \
&& ! AT_END && TOP_LEVEL \
&& DECL_INITIAL (DECL) == error_mark_node \
&& !size_directive_output) \
{ \
size_directive_output = 1; \
size = tree_to_uhwi (DECL_SIZE_UNIT (DECL)); \
ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
} \
} \
while (0)
/* This is how to declare the size of a function. */
#ifndef ASM_DECLARE_FUNCTION_SIZE
#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
do \
{ \
if (!flag_inhibit_size_directive) \
ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
} \
while (0)
#endif
/* This is how to declare the size of a cold function partition. */
#ifndef ASM_DECLARE_COLD_FUNCTION_SIZE
#define ASM_DECLARE_COLD_FUNCTION_SIZE(FILE, FNAME, DECL) \
do \
{ \
if (!flag_inhibit_size_directive) \
ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
} \
while (0)
#endif
/* A table of bytes codes used by the ASM_OUTPUT_ASCII and
ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
corresponds to a particular byte value [0..255]. For any
given byte value, if the value in the corresponding table
position is zero, the given character can be output directly.
If the table value is 1, the byte must be output as a \ooo
octal escape. If the tables value is anything else, then the
byte value should be output as a \ followed by the value
in the table. Note that we can use standard UN*X escape
sequences for many control characters, but we don't use
\a to represent BEL because some svr4 assemblers (e.g. on
the i386) don't know about that. Also, we don't use \v
since some versions of gas, such as 2.2 did not accept it. */
#define ELF_ASCII_ESCAPES \
"\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
\0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
/* Some svr4 assemblers have a limit on the number of characters which
can appear in the operand of a .string directive. If your assembler
has such a limitation, you should define STRING_LIMIT to reflect that
limit. Note that at least some svr4 assemblers have a limit on the
actual number of bytes in the double-quoted string, and that they
count each character in an escape sequence as one byte. Thus, an
escape sequence like \377 would count as four bytes.
If your target assembler doesn't support the .string directive, you
should define this to zero.
*/
#define ELF_STRING_LIMIT ((unsigned) 256)
#define STRING_ASM_OP "\t.string\t"
/* The routine used to output NUL terminated strings. We use a special
version of this for most svr4 targets because doing so makes the
generated assembly code more compact (and thus faster to assemble)
as well as more readable, especially for targets like the i386
(where the only alternative is to output character sequences as
comma separated lists of numbers). */
#define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
default_elf_asm_output_limited_string ((FILE), (STR))
/* The routine used to output sequences of byte values. We use a special
version of this for most svr4 targets because doing so makes the
generated assembly code more compact (and thus faster to assemble)
as well as more readable. Note that if we find subparts of the
character sequence which end with NUL (and which are shorter than
STRING_LIMIT) we output those using ASM_OUTPUT_LIMITED_STRING. */
#undef ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH) \
default_elf_asm_output_ascii ((FILE), (STR), (LENGTH))
/* Allow the use of the -frecord-gcc-switches switch via the
elf_record_gcc_switches function defined in varasm.cc. */
#undef TARGET_ASM_RECORD_GCC_SWITCHES
#define TARGET_ASM_RECORD_GCC_SWITCHES elf_record_gcc_switches
/* A C statement (sans semicolon) to output to the stdio stream STREAM
any text necessary for declaring the name of an external symbol
named NAME which is referenced in this compilation but not defined.
It is needed to properly support non-default visibility. */
#ifndef ASM_OUTPUT_EXTERNAL
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
default_elf_asm_output_external (FILE, DECL, NAME)
#endif
#undef TARGET_LIBC_HAS_FUNCTION
#define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function

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/* Definitions for ELF systems with .init_array/.fini_array section
support.
Copyright (C) 2011-2023 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#if HAVE_INITFINI_ARRAY_SUPPORT
#define USE_INITFINI_ARRAY
#undef INIT_SECTION_ASM_OP
#undef FINI_SECTION_ASM_OP
#undef INIT_ARRAY_SECTION_ASM_OP
#define INIT_ARRAY_SECTION_ASM_OP
#undef FINI_ARRAY_SECTION_ASM_OP
#define FINI_ARRAY_SECTION_ASM_OP
/* Use .init_array/.fini_array section for constructors and destructors. */
#undef TARGET_ASM_CONSTRUCTOR
#define TARGET_ASM_CONSTRUCTOR default_elf_init_array_asm_out_constructor
#undef TARGET_ASM_DESTRUCTOR
#define TARGET_ASM_DESTRUCTOR default_elf_fini_array_asm_out_destructor
#endif

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/* Definitions for <stdint.h> types on systems using newlib.
Copyright (C) 2008-2023 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
/* newlib uses 32-bit long in certain cases for all non-SPU
targets. */
#ifndef STDINT_LONG32
#define STDINT_LONG32 (LONG_TYPE_SIZE == 32)
#endif
#define SIG_ATOMIC_TYPE "int"
/* The newlib logic actually checks for sizes greater than 32 rather
than equal to 64 for various 64-bit types. */
#define INT8_TYPE (CHAR_TYPE_SIZE == 8 ? "signed char" : 0)
#define INT16_TYPE (SHORT_TYPE_SIZE == 16 ? "short int" : INT_TYPE_SIZE == 16 ? "int" : CHAR_TYPE_SIZE == 16 ? "signed char" : 0)
#define INT32_TYPE (STDINT_LONG32 ? "long int" : INT_TYPE_SIZE == 32 ? "int" : SHORT_TYPE_SIZE == 32 ? "short int" : CHAR_TYPE_SIZE == 32 ? "signed char" : 0)
#define INT64_TYPE (LONG_TYPE_SIZE == 64 ? "long int" : LONG_LONG_TYPE_SIZE == 64 ? "long long int" : INT_TYPE_SIZE == 64 ? "int" : 0)
#define UINT8_TYPE (CHAR_TYPE_SIZE == 8 ? "unsigned char" : 0)
#define UINT16_TYPE (SHORT_TYPE_SIZE == 16 ? "short unsigned int" : INT_TYPE_SIZE == 16 ? "unsigned int" : CHAR_TYPE_SIZE == 16 ? "unsigned char" : 0)
#define UINT32_TYPE (STDINT_LONG32 ? "long unsigned int" : INT_TYPE_SIZE == 32 ? "unsigned int" : SHORT_TYPE_SIZE == 32 ? "short unsigned int" : CHAR_TYPE_SIZE == 32 ? "unsigned char" : 0)
#define UINT64_TYPE (LONG_TYPE_SIZE == 64 ? "long unsigned int" : LONG_LONG_TYPE_SIZE == 64 ? "long long unsigned int" : INT_TYPE_SIZE == 64 ? "unsigned int" : 0)
#define INT_LEAST8_TYPE (INT8_TYPE ? INT8_TYPE : INT16_TYPE ? INT16_TYPE : INT32_TYPE ? INT32_TYPE : INT64_TYPE ? INT64_TYPE : 0)
#define INT_LEAST16_TYPE (INT16_TYPE ? INT16_TYPE : INT32_TYPE ? INT32_TYPE : INT64_TYPE ? INT64_TYPE : 0)
#define INT_LEAST32_TYPE (INT32_TYPE ? INT32_TYPE : INT64_TYPE ? INT64_TYPE : 0)
#define INT_LEAST64_TYPE INT64_TYPE
#define UINT_LEAST8_TYPE (UINT8_TYPE ? UINT8_TYPE : UINT16_TYPE ? UINT16_TYPE : UINT32_TYPE ? UINT32_TYPE : UINT64_TYPE ? UINT64_TYPE : 0)
#define UINT_LEAST16_TYPE (UINT16_TYPE ? UINT16_TYPE : UINT32_TYPE ? UINT32_TYPE : UINT64_TYPE ? UINT64_TYPE : 0)
#define UINT_LEAST32_TYPE (UINT32_TYPE ? UINT32_TYPE : UINT64_TYPE ? UINT64_TYPE : 0)
#define UINT_LEAST64_TYPE UINT64_TYPE
#define INT_FAST8_TYPE (INT_TYPE_SIZE >= 8 ? "int" : INT_LEAST8_TYPE)
#define INT_FAST16_TYPE (INT_TYPE_SIZE >= 16 ? "int" : INT_LEAST16_TYPE)
#define INT_FAST32_TYPE (INT_TYPE_SIZE >= 32 ? "int" : INT_LEAST32_TYPE)
#define INT_FAST64_TYPE (INT_TYPE_SIZE >= 64 ? "int" : INT_LEAST64_TYPE)
#define UINT_FAST8_TYPE (INT_TYPE_SIZE >= 8 ? "unsigned int" : UINT_LEAST8_TYPE)
#define UINT_FAST16_TYPE (INT_TYPE_SIZE >= 16 ? "unsigned int" : UINT_LEAST16_TYPE)
#define UINT_FAST32_TYPE (INT_TYPE_SIZE >= 32 ? "unsigned int" : UINT_LEAST32_TYPE)
#define UINT_FAST64_TYPE (INT_TYPE_SIZE >= 64 ? "unsigned int" : UINT_LEAST64_TYPE)
/* Newlib uses the unsigned type corresponding to ptrdiff_t for
uintptr_t; this is the same as size_t for most newlib-using
targets. */
#define INTPTR_TYPE PTRDIFF_TYPE
#ifndef UINTPTR_TYPE
#define UINTPTR_TYPE SIZE_TYPE
#endif

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/* Target macros for riscv*-elf targets.
Copyright (C) 1994-2023 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#define LINK_SPEC "\
-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv \
%{mno-relax:--no-relax} \
%{mbig-endian:-EB} \
%{mlittle-endian:-EL} \
%{shared}"
/* Link against Newlib libraries, because the ELF backend assumes Newlib.
Handle the circular dependence between libc and libgloss. */
#undef LIB_SPEC
#define LIB_SPEC \
"--start-group -lc %{!specs=nosys.specs:-lgloss} --end-group " \
"%{!nostartfiles:%{!nodefaultlibs:%{!nolibc:%{!nostdlib:%:riscv_multi_lib_check()}}}}"
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "crt0%O%s crtbegin%O%s"
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend%O%s"
#define RISCV_USE_CUSTOMISED_MULTI_LIB select_by_abi_arch_cmodel

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/* Definition of RISC-V target for GNU compiler.
Copyright (C) 2016-2023 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_RISCV_OPTS_H
#define GCC_RISCV_OPTS_H
enum riscv_abi_type {
ABI_ILP32,
ABI_ILP32E,
ABI_ILP32F,
ABI_ILP32D,
ABI_LP64,
ABI_LP64F,
ABI_LP64D
};
extern enum riscv_abi_type riscv_abi;
enum riscv_code_model {
CM_MEDLOW,
CM_MEDANY,
CM_PIC
};
extern enum riscv_code_model riscv_cmodel;
enum riscv_isa_spec_class {
ISA_SPEC_CLASS_NONE,
ISA_SPEC_CLASS_2P2,
ISA_SPEC_CLASS_20190608,
ISA_SPEC_CLASS_20191213
};
extern enum riscv_isa_spec_class riscv_isa_spec;
/* Keep this list in sync with define_attr "tune" in riscv.md. */
enum riscv_microarchitecture_type {
generic,
sifive_7
};
extern enum riscv_microarchitecture_type riscv_microarchitecture;
enum riscv_align_data {
riscv_align_data_type_xlen,
riscv_align_data_type_natural
};
/* Where to get the canary for the stack protector. */
enum stack_protector_guard {
SSP_TLS, /* per-thread canary in TLS block */
SSP_GLOBAL /* global canary */
};
enum riscv_multilib_select_kind {
/* Select multilib by builtin way. */
select_by_builtin,
/* Select multilib by ABI, arch and code model. */
select_by_abi_arch_cmodel,
/* Select multilib by ABI only. */
select_by_abi,
};
#define MASK_ZICSR (1 << 0)
#define MASK_ZIFENCEI (1 << 1)
#define TARGET_ZICSR ((riscv_zi_subext & MASK_ZICSR) != 0)
#define TARGET_ZIFENCEI ((riscv_zi_subext & MASK_ZIFENCEI) != 0)
#define MASK_ZAWRS (1 << 0)
#define TARGET_ZAWRS ((riscv_za_subext & MASK_ZAWRS) != 0)
#define MASK_ZBA (1 << 0)
#define MASK_ZBB (1 << 1)
#define MASK_ZBC (1 << 2)
#define MASK_ZBS (1 << 3)
#define TARGET_ZBA ((riscv_zb_subext & MASK_ZBA) != 0)
#define TARGET_ZBB ((riscv_zb_subext & MASK_ZBB) != 0)
#define TARGET_ZBC ((riscv_zb_subext & MASK_ZBC) != 0)
#define TARGET_ZBS ((riscv_zb_subext & MASK_ZBS) != 0)
#define MASK_ZFINX (1 << 0)
#define MASK_ZDINX (1 << 1)
#define MASK_ZHINX (1 << 2)
#define MASK_ZHINXMIN (1 << 3)
#define TARGET_ZFINX ((riscv_zinx_subext & MASK_ZFINX) != 0)
#define TARGET_ZDINX ((riscv_zinx_subext & MASK_ZDINX) != 0)
#define TARGET_ZHINX ((riscv_zinx_subext & MASK_ZHINX) != 0)
#define TARGET_ZHINXMIN ((riscv_zinx_subext & MASK_ZHINXMIN) != 0)
#define MASK_ZBKB (1 << 0)
#define MASK_ZBKC (1 << 1)
#define MASK_ZBKX (1 << 2)
#define MASK_ZKNE (1 << 3)
#define MASK_ZKND (1 << 4)
#define MASK_ZKNH (1 << 5)
#define MASK_ZKR (1 << 6)
#define MASK_ZKSED (1 << 7)
#define MASK_ZKSH (1 << 8)
#define MASK_ZKT (1 << 9)
#define TARGET_ZBKB ((riscv_zk_subext & MASK_ZBKB) != 0)
#define TARGET_ZBKC ((riscv_zk_subext & MASK_ZBKC) != 0)
#define TARGET_ZBKX ((riscv_zk_subext & MASK_ZBKX) != 0)
#define TARGET_ZKNE ((riscv_zk_subext & MASK_ZKNE) != 0)
#define TARGET_ZKND ((riscv_zk_subext & MASK_ZKND) != 0)
#define TARGET_ZKNH ((riscv_zk_subext & MASK_ZKNH) != 0)
#define TARGET_ZKR ((riscv_zk_subext & MASK_ZKR) != 0)
#define TARGET_ZKSED ((riscv_zk_subext & MASK_ZKSED) != 0)
#define TARGET_ZKSH ((riscv_zk_subext & MASK_ZKSH) != 0)
#define TARGET_ZKT ((riscv_zk_subext & MASK_ZKT) != 0)
#define MASK_VECTOR_ELEN_32 (1 << 0)
#define MASK_VECTOR_ELEN_64 (1 << 1)
#define MASK_VECTOR_ELEN_FP_32 (1 << 2)
#define MASK_VECTOR_ELEN_FP_64 (1 << 3)
#define TARGET_VECTOR_ELEN_32 \
((riscv_vector_elen_flags & MASK_VECTOR_ELEN_32) != 0)
#define TARGET_VECTOR_ELEN_64 \
((riscv_vector_elen_flags & MASK_VECTOR_ELEN_64) != 0)
#define TARGET_VECTOR_ELEN_FP_32 \
((riscv_vector_elen_flags & MASK_VECTOR_ELEN_FP_32) != 0)
#define TARGET_VECTOR_ELEN_FP_64 \
((riscv_vector_elen_flags & MASK_VECTOR_ELEN_FP_64) != 0)
#define MASK_ZVL32B (1 << 0)
#define MASK_ZVL64B (1 << 1)
#define MASK_ZVL128B (1 << 2)
#define MASK_ZVL256B (1 << 3)
#define MASK_ZVL512B (1 << 4)
#define MASK_ZVL1024B (1 << 5)
#define MASK_ZVL2048B (1 << 6)
#define MASK_ZVL4096B (1 << 7)
#define MASK_ZVL8192B (1 << 8)
#define MASK_ZVL16384B (1 << 9)
#define MASK_ZVL32768B (1 << 10)
#define MASK_ZVL65536B (1 << 11)
#define TARGET_ZVL32B ((riscv_zvl_flags & MASK_ZVL32B) != 0)
#define TARGET_ZVL64B ((riscv_zvl_flags & MASK_ZVL64B) != 0)
#define TARGET_ZVL128B ((riscv_zvl_flags & MASK_ZVL128B) != 0)
#define TARGET_ZVL256B ((riscv_zvl_flags & MASK_ZVL256B) != 0)
#define TARGET_ZVL512B ((riscv_zvl_flags & MASK_ZVL512B) != 0)
#define TARGET_ZVL1024B ((riscv_zvl_flags & MASK_ZVL1024B) != 0)
#define TARGET_ZVL2048B ((riscv_zvl_flags & MASK_ZVL2048B) != 0)
#define TARGET_ZVL4096B ((riscv_zvl_flags & MASK_ZVL4096B) != 0)
#define TARGET_ZVL8192B ((riscv_zvl_flags & MASK_ZVL8192B) != 0)
#define TARGET_ZVL16384B ((riscv_zvl_flags & MASK_ZVL16384B) != 0)
#define TARGET_ZVL32768B ((riscv_zvl_flags & MASK_ZVL32768B) != 0)
#define TARGET_ZVL65536B ((riscv_zvl_flags & MASK_ZVL65536B) != 0)
#define MASK_ZICBOZ (1 << 0)
#define MASK_ZICBOM (1 << 1)
#define MASK_ZICBOP (1 << 2)
#define TARGET_ZICBOZ ((riscv_zicmo_subext & MASK_ZICBOZ) != 0)
#define TARGET_ZICBOM ((riscv_zicmo_subext & MASK_ZICBOM) != 0)
#define TARGET_ZICBOP ((riscv_zicmo_subext & MASK_ZICBOP) != 0)
#define MASK_ZFHMIN (1 << 0)
#define MASK_ZFH (1 << 1)
#define TARGET_ZFHMIN ((riscv_zf_subext & MASK_ZFHMIN) != 0)
#define TARGET_ZFH ((riscv_zf_subext & MASK_ZFH) != 0)
#define MASK_ZMMUL (1 << 0)
#define TARGET_ZMMUL ((riscv_zm_subext & MASK_ZMMUL) != 0)
#define MASK_SVINVAL (1 << 0)
#define MASK_SVNAPOT (1 << 1)
#define TARGET_SVINVAL ((riscv_sv_subext & MASK_SVINVAL) != 0)
#define TARGET_SVNAPOT ((riscv_sv_subext & MASK_SVNAPOT) != 0)
/* Bit of riscv_zvl_flags will set contintuly, N-1 bit will set if N-bit is
set, e.g. MASK_ZVL64B has set then MASK_ZVL32B is set, so we can use
popcount to caclulate the minimal VLEN. */
#define TARGET_MIN_VLEN \
((riscv_zvl_flags == 0) \
? 0 \
: 32 << (__builtin_popcount (riscv_zvl_flags) - 1))
#define MASK_XTHEADBA (1 << 0)
#define MASK_XTHEADBB (1 << 1)
#define MASK_XTHEADBS (1 << 2)
#define MASK_XTHEADCMO (1 << 3)
#define MASK_XTHEADCONDMOV (1 << 4)
#define MASK_XTHEADFMEMIDX (1 << 5)
#define MASK_XTHEADFMV (1 << 6)
#define MASK_XTHEADINT (1 << 7)
#define MASK_XTHEADMAC (1 << 8)
#define MASK_XTHEADMEMIDX (1 << 9)
#define MASK_XTHEADMEMPAIR (1 << 10)
#define MASK_XTHEADSYNC (1 << 11)
#define TARGET_XTHEADBA ((riscv_xthead_subext & MASK_XTHEADBA) != 0)
#define TARGET_XTHEADBB ((riscv_xthead_subext & MASK_XTHEADBB) != 0)
#define TARGET_XTHEADBS ((riscv_xthead_subext & MASK_XTHEADBS) != 0)
#define TARGET_XTHEADCMO ((riscv_xthead_subext & MASK_XTHEADCMO) != 0)
#define TARGET_XTHEADCONDMOV ((riscv_xthead_subext & MASK_XTHEADCONDMOV) != 0)
#define TARGET_XTHEADFMEMIDX ((riscv_xthead_subext & MASK_XTHEADFMEMIDX) != 0)
#define TARGET_XTHEADFMV ((riscv_xthead_subext & MASK_XTHEADFMV) != 0)
#define TARGET_XTHEADINT ((riscv_xthead_subext & MASK_XTHEADINT) != 0)
#define TARGET_XTHEADMAC ((riscv_xthead_subext & MASK_XTHEADMAC) != 0)
#define TARGET_XTHEADMEMIDX ((riscv_xthead_subext & MASK_XTHEADMEMIDX) != 0)
#define TARGET_XTHEADMEMPAIR ((riscv_xthead_subext & MASK_XTHEADMEMPAIR) != 0)
#define TARGET_XTHEADSYNC ((riscv_xthead_subext & MASK_XTHEADSYNC) != 0)
#endif /* ! GCC_RISCV_OPTS_H */

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/* Definition of RISC-V target for GNU compiler.
Copyright (C) 2011-2023 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_RISCV_PROTOS_H
#define GCC_RISCV_PROTOS_H
#include "memmodel.h"
/* Symbol types we understand. The order of this list must match that of
the unspec enum in riscv.md, subsequent to UNSPEC_ADDRESS_FIRST. */
enum riscv_symbol_type {
SYMBOL_ABSOLUTE,
SYMBOL_PCREL,
SYMBOL_GOT_DISP,
SYMBOL_TLS,
SYMBOL_TLS_LE,
SYMBOL_TLS_IE,
SYMBOL_TLS_GD
};
#define NUM_SYMBOL_TYPES (SYMBOL_TLS_GD + 1)
/* Routines implemented in riscv.cc. */
extern enum riscv_symbol_type riscv_classify_symbolic_expression (rtx);
extern bool riscv_symbolic_constant_p (rtx, enum riscv_symbol_type *);
extern int riscv_regno_mode_ok_for_base_p (int, machine_mode, bool);
extern int riscv_address_insns (rtx, machine_mode, bool);
extern int riscv_const_insns (rtx);
extern int riscv_split_const_insns (rtx);
extern int riscv_load_store_insns (rtx, rtx_insn *);
extern rtx riscv_emit_move (rtx, rtx);
extern bool riscv_split_symbol (rtx, rtx, machine_mode, rtx *, bool);
extern bool riscv_split_symbol_type (enum riscv_symbol_type);
extern rtx riscv_unspec_address (rtx, enum riscv_symbol_type);
extern void riscv_move_integer (rtx, rtx, HOST_WIDE_INT, machine_mode, bool);
extern bool riscv_legitimize_move (machine_mode, rtx, rtx);
extern rtx riscv_subword (rtx, bool);
extern bool riscv_split_64bit_move_p (rtx, rtx);
extern void riscv_split_doubleword_move (rtx, rtx);
extern const char *riscv_output_move (rtx, rtx);
extern const char *riscv_output_return ();
#ifdef RTX_CODE
extern void riscv_expand_int_scc (rtx, enum rtx_code, rtx, rtx);
extern void riscv_expand_float_scc (rtx, enum rtx_code, rtx, rtx);
extern void riscv_expand_conditional_branch (rtx, enum rtx_code, rtx, rtx);
#endif
extern bool riscv_expand_conditional_move (rtx, rtx, rtx, rtx);
extern rtx riscv_legitimize_call_address (rtx);
extern void riscv_set_return_address (rtx, rtx);
extern bool riscv_expand_block_move (rtx, rtx, rtx);
extern rtx riscv_return_addr (int, rtx);
extern poly_int64 riscv_initial_elimination_offset (int, int);
extern void riscv_expand_prologue (void);
extern void riscv_expand_epilogue (int);
extern bool riscv_epilogue_uses (unsigned int);
extern bool riscv_can_use_return_insn (void);
extern rtx riscv_function_value (const_tree, const_tree, enum machine_mode);
extern bool riscv_expand_block_move (rtx, rtx, rtx);
extern bool riscv_store_data_bypass_p (rtx_insn *, rtx_insn *);
extern rtx riscv_gen_gpr_save_insn (struct riscv_frame_info *);
extern bool riscv_gpr_save_operation_p (rtx);
extern void riscv_reinit (void);
extern poly_uint64 riscv_regmode_natural_size (machine_mode);
extern bool riscv_v_ext_vector_mode_p (machine_mode);
extern bool riscv_shamt_matches_mask_p (int, HOST_WIDE_INT);
extern void riscv_subword_address (rtx, rtx *, rtx *, rtx *, rtx *);
extern void riscv_lshift_subword (machine_mode, rtx, rtx, rtx *);
extern enum memmodel riscv_union_memmodels (enum memmodel, enum memmodel);
/* Routines implemented in riscv-c.cc. */
void riscv_cpu_cpp_builtins (cpp_reader *);
void riscv_register_pragmas (void);
/* Routines implemented in riscv-builtins.cc. */
extern void riscv_atomic_assign_expand_fenv (tree *, tree *, tree *);
extern bool riscv_gimple_fold_builtin (gimple_stmt_iterator *);
extern rtx riscv_expand_builtin (tree, rtx, rtx, machine_mode, int);
extern tree riscv_builtin_decl (unsigned int, bool);
extern void riscv_init_builtins (void);
/* Routines implemented in riscv-common.cc. */
extern std::string riscv_arch_str (bool version_p = true);
extern void riscv_parse_arch_string (const char *, struct gcc_options *, location_t);
extern bool riscv_hard_regno_rename_ok (unsigned, unsigned);
rtl_opt_pass * make_pass_shorten_memrefs (gcc::context *ctxt);
rtl_opt_pass * make_pass_vsetvl (gcc::context *ctxt);
/* Information about one CPU we know about. */
struct riscv_cpu_info {
/* This CPU's canonical name. */
const char *name;
/* Default arch for this CPU, could be NULL if no default arch. */
const char *arch;
/* Which automaton to use for tuning. */
const char *tune;
};
extern const riscv_cpu_info *riscv_find_cpu (const char *);
/* Routines implemented in riscv-selftests.cc. */
#if CHECKING_P
namespace selftest {
void riscv_run_selftests (void);
} // namespace selftest
#endif
namespace riscv_vector {
#define RVV_VLMAX gen_rtx_REG (Pmode, X0_REGNUM)
#define RVV_VUNDEF(MODE) \
gen_rtx_UNSPEC (MODE, gen_rtvec (1, gen_rtx_REG (SImode, X0_REGNUM)), \
UNSPEC_VUNDEF)
enum vlmul_type
{
LMUL_1 = 0,
LMUL_2 = 1,
LMUL_4 = 2,
LMUL_8 = 3,
LMUL_RESERVED = 4,
LMUL_F8 = 5,
LMUL_F4 = 6,
LMUL_F2 = 7,
NUM_LMUL = 8
};
enum avl_type
{
NONVLMAX,
VLMAX,
};
/* Routines implemented in riscv-vector-builtins.cc. */
void init_builtins (void);
const char *mangle_builtin_type (const_tree);
#ifdef GCC_TARGET_H
bool verify_type_context (location_t, type_context_kind, const_tree, bool);
#endif
void handle_pragma_vector (void);
tree builtin_decl (unsigned, bool);
gimple *gimple_fold_builtin (unsigned int, gimple_stmt_iterator *, gcall *);
rtx expand_builtin (unsigned int, tree, rtx);
bool check_builtin_call (location_t, vec<location_t>, unsigned int,
tree, unsigned int, tree *);
bool const_vec_all_same_in_range_p (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
bool legitimize_move (rtx, rtx, machine_mode);
void emit_vlmax_vsetvl (machine_mode, rtx);
void emit_hard_vlmax_vsetvl (machine_mode, rtx);
void emit_vlmax_op (unsigned, rtx, rtx, machine_mode);
void emit_vlmax_op (unsigned, rtx, rtx, rtx, machine_mode);
void emit_nonvlmax_op (unsigned, rtx, rtx, rtx, machine_mode);
enum vlmul_type get_vlmul (machine_mode);
unsigned int get_ratio (machine_mode);
int get_ta (rtx);
int get_ma (rtx);
int get_avl_type (rtx);
unsigned int calculate_ratio (unsigned int, enum vlmul_type);
enum tail_policy
{
TAIL_UNDISTURBED = 0,
TAIL_AGNOSTIC = 1,
TAIL_ANY = 2,
};
enum mask_policy
{
MASK_UNDISTURBED = 0,
MASK_AGNOSTIC = 1,
MASK_ANY = 2,
};
enum tail_policy get_prefer_tail_policy ();
enum mask_policy get_prefer_mask_policy ();
rtx get_avl_type_rtx (enum avl_type);
opt_machine_mode get_vector_mode (scalar_mode, poly_uint64);
bool simm5_p (rtx);
bool neg_simm5_p (rtx);
#ifdef RTX_CODE
bool has_vi_variant_p (rtx_code, rtx);
#endif
bool sew64_scalar_helper (rtx *, rtx *, rtx, machine_mode, machine_mode,
bool, void (*)(rtx *, rtx));
rtx gen_scalar_move_mask (machine_mode);
/* RVV vector register sizes.
TODO: Currently, we only add RVV_32/RVV_64/RVV_128, we may need to
support other values in the future. */
enum vlen_enum
{
RVV_32 = 32,
RVV_64 = 64,
RVV_65536 = 65536
};
bool slide1_sew64_helper (int, machine_mode, machine_mode,
machine_mode, rtx *);
rtx gen_avl_for_scalar_move (rtx);
}
/* We classify builtin types into two classes:
1. General builtin class which is defined in riscv_builtins.
2. Vector builtin class which is a special builtin architecture
that implement intrinsic short into "pragma". */
enum riscv_builtin_class
{
RISCV_BUILTIN_GENERAL,
RISCV_BUILTIN_VECTOR
};
const unsigned int RISCV_BUILTIN_SHIFT = 1;
/* Mask that selects the riscv_builtin_class part of a function code. */
const unsigned int RISCV_BUILTIN_CLASS = (1 << RISCV_BUILTIN_SHIFT) - 1;
/* Routines implemented in thead.cc. */
extern bool th_mempair_operands_p (rtx[4], bool, machine_mode);
extern void th_mempair_order_operands (rtx[4], bool, machine_mode);
extern void th_mempair_prepare_save_restore_operands (rtx[4], bool,
machine_mode,
int, HOST_WIDE_INT,
int, HOST_WIDE_INT);
extern void th_mempair_save_restore_regs (rtx[4], bool, machine_mode);
#ifdef RTX_CODE
extern const char*
th_mempair_output_move (rtx[4], bool, machine_mode, RTX_CODE);
#endif
#endif /* ! GCC_RISCV_PROTOS_H */